For the complete documentation index, see llms.txt. Markdown versions of all pages are available by appending .md to any URL (e.g. /max/get-started.md).
Mojo struct
AMDIGLPStrategy
struct AMDIGLPStrategy
Preset strategy values for the llvm.amdgcn.iglp.opt intrinsic.
LLVM AMDGPU defines these as named presets in AMDGPUIGroupLP.cpp;
the integer values are the second argument to the intrinsic. All
presets assume MFMAs are present in the region; using on a
non-MFMA region falls back gracefully but provides no constraints.
Per AMD docs, mutually exclusive with sched_group_barrier in
the same scheduling region — pick one or the other per cluster.
Implemented traits
AnyType,
Copyable,
Equatable,
ImplicitlyCopyable,
ImplicitlyDeletable,
Intable,
Movable,
RegisterPassable,
TrivialRegisterPassable
comptime members
MFMA_EXP_INTERLEAVE
comptime MFMA_EXP_INTERLEAVE = AMDIGLPStrategy(Int32(2))
MFMAExpInterleaveOpt — multi-phase attention preset (MFMA + exp2).
Drives the MFMA/VALU/TRANS triple interleave that flash-attention-style
softmax wants (used by mla_prefill).
MFMA_EXP_SIMPLE_INTERLEAVE
comptime MFMA_EXP_SIMPLE_INTERLEAVE = AMDIGLPStrategy(Int32(3))
MFMAExpSimpleInterleaveOpt — interleaves 1 TRANS per 1 MFMA.
MFMA_SMALL_GEMM
comptime MFMA_SMALL_GEMM = AMDIGLPStrategy(Int32(0))
MFMASmallGemmOpt — interleaves 2 DS reads per 1 MFMA.
MFMA_SMALL_GEMM_SINGLE_WAVE
comptime MFMA_SMALL_GEMM_SINGLE_WAVE = AMDIGLPStrategy(Int32(1))
MFMASmallGemmSingleWaveOpt — single-wave variant for small GEMMs.
Methods
__eq__
__ne__
__int__
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