For the complete documentation index, see llms.txt. Markdown versions of all pages are available by appending .md to any URL (e.g. /get-started.md).
Mojo module
rowwise_types
Target-neutral ContextParams + Context types for the row-wise reduction scaffolder. In its own module so the CPU and GPU backends can both import it without an import cycle through the unified rowwise dispatcher.
ContextParams.target (comptime StaticString) is the dispatcher's
switch: "cpu" selects the CPU backend, anything else the GPU backend.
The GPU-only runtime fields on Context (split-K plumbing) hold
sentinels on CPU and are never read β every access is behind a
comptime if is_cpu[params.target]: branch that dead-code-eliminates.
Member-naming convention: members a body reads have plain names
(axis, emit_tile_width, simd_width, BLOCK_SIZE, target,
accumulator_width); scaffolder-internal members β the tier
discriminators and split-K plumbing β are _-prefixed.
comptime valuesβ
RowBodyβ
comptime RowBody = def[_p: ContextParams](Coord[**?], mut Context[_p]) -> None & RegisterPassable & ImplicitlyCopyable
Bound for the per-row body threaded through the launch as a VALUE.
The body is a value closure (not a comptime capturing parameter): the
GPU backend crosses it into the kernel as a struct field, so its
copy-captured state (the fused input_fn / output_fn value closures,
axis_size) is serialized across the launch. ImplicitlyCopyable & RegisterPassable lets the kernel struct hold it as a register-passable
field; the callable trait is non-capturing (captures ride the value).
Structsβ
- β
Context: Per-block dispatch bundle. Comptime tier identity and widths flow throughparams; runtime per-block plumbing (split-K scratch + position) sits invarfields. The body forwardsctxtorowwise.reduce/rowwise.onceand treats it as opaque, reading only the plainly-named members (ctx.axis,ctx.accumulator_width, ...). The_-prefixed members (ctx._tier,ctx._partials_base, ...) are scaffolder internals. - β
ContextParams: Comptime half ofContext. Bundled into one template parameter so callers writeContext[params]instead of threading eight separate comptime args. - β
ReduceTier: GPU tier discriminator for the row-wise scaffolder. Mutually exclusive by construction (a single field, not independent bools):Blockis the default (also every CPU tier, where onlyemit_tile_width/simd_widthmatter). Scaffolder-internal β a body never readsContext._tier.
Functionsβ
- β
tile_alignment: Memory alignment a row-wise body's store β or itsinput_fn's load β should use for a width-wstile ofdtypeontarget.