IMPORTANT: To view this page as Markdown, append `.md` to the URL (e.g. /get-started.md). For the complete documentation index, see llms.txt.
Skip to main content
For the complete documentation index, see llms.txt. Markdown versions of all pages are available by appending .md to any URL (e.g. /get-started.md).

Mojo function

launch

def launch[Body: RowBody, //, axis: Int, simd_width: Int, supports_tiled: Bool = False, associative: Bool = False](body: Body, shape: Coord)

Top-level CPU scaffolder. Picks the tier from axis and supports_tiled, parallelizes over outputs (or output tiles), and invokes the body once per output (or tile).

Tier choice:

  • Inner axis (axis == rank - 1) β€” one worker per row, vectorize within the row at simd_width. emit_tile_width = 1.
  • Non-inner axis with supports_tiled β€” one worker per slice; each walks the innermost-non-axis dim in simd_width tiles, with a scalar tail for the remainder. emit_tile_width = simd_width.
  • Non-inner axis without supports_tiled β€” one worker per output, scalar reduce. emit_tile_width = 1.

Parameters:

  • ​axis (Int): Axis being reduced.
  • ​simd_width (Int): SIMD width for tile dispatch. Bodies compute it via rowwise.pick_simd_width[...] and pass it directly; the scaffolder no longer derives it from a dtype.
  • ​supports_tiled (Bool): Whether the body can run in the tiled tier (emit_tile_width > 1). Single-output reductions (reduce_sum, …) set this True; multi-output kernels (softmax, layernorm) set it False.
  • ​associative (Bool): Opt in the inner-axis cooperative tier's wide (_CPU_ILP_ACCUMULATORS * simd_width) same-dtype accumulator for rows >= _CPU_WIDE_ACC_MIN_ROW, breaking the serial accumulate dependency chain. Additive reductions (reduce_sum, reduce_mean) set this True; everything else keeps the native width.

Args:

  • ​body (Body): The per-row computation. Receives a Context and the row's Coord; uses reduce / pjoin / once / simd to compose the algorithm.
  • ​shape (Coord): Tensor shape.

Raises:

If a worker raises.