For the complete documentation index, see llms.txt. Markdown versions of all pages are available by appending .md to any URL (e.g. /get-started.md).
Mojo module
rowwise
CPU row-wise reduction scaffolder.
Mirrors the body-facing surface of algorithm.gpu.rowwise
so the same body[params: ContextParams](row_coords, mut ctx) works
for both targets. Reuses GPU's ContextParams / Context types
verbatim; the GPU-only runtime fields (split-K pointers and counters)
get sentinels and are never read.
Tier mapping CPU β GPU:
- Inner-axis cooperative (
emit_tile_width == 1,axis == rank - 1): one worker per row, vectorize the row atsimd_width. Mirrors the GPU block tier withBLOCK_SIZE = 1. - Non-inner-axis tiled (
emit_tile_width > 1,supports_tiled): one worker per slice; tile the innermost-non-axis dim withW = simd_widthindependent accumulators. Mirrors the GPU tiled tier. - Non-inner-axis cooperative (
emit_tile_width == 1,!supports_tiled): one worker per output, scalar walk over the reduce axis. Mirrors the GPU cooperative-non-inner tier.
pjoin is a no-op on CPU and once runs unconditionally: one worker
owns each output, so the monoid state is already final after reduce.
Structsβ
- β
SerialReducer: Single-participantReducerfor CPU's serial / cooperative tier. Nothing to combine across (one worker per output), sosum/max/min/genericare identity. Routingcpu_rowwise.pjointhrough it rather than skipping the call still invokes the monoid's ownpjoinbody, which may do per-state finalization (e.g.ReduceSumhorizontally reducing its SIMD-wide accumulator into the scalaraccfield exposed to bodies).
Functionsβ
- β
launch: Top-level CPU scaffolder. Picks the tier fromaxisandsupports_tiled, parallelizes over outputs (or output tiles), and invokes the body once per output (or tile). - β
once: CPU: runsemitunconditionally on the cooperative / tiled tiers (one worker per output), or gated onctx._is_last_blockon the split-axis tier (only the last-arriving worker emits). - β
pjoin: CPU: drives the monoid'spjoinbody viaSerialReducerin the cooperative tier, or merges the cross-worker partials buffer in the split-axis tier. - β
reduce: Drivestile_fnover the reduce axis, CPU-side, with no monoid state β pure per-tile iteration for map/emit terminals (see the state-carrying overload below for reduce phases).