Mojo function

load

load[type: DType, //, width: Int = 1, *, read_only: Bool = False, prefetch_size: OptionalReg[Int] = OptionalReg[Int]({:i1 0, 1}), cache_policy: CacheOperation = CacheOperation(0), eviction_policy: CacheEviction = CacheEviction(0), alignment: Int = alignof[::AnyType,__mlir_type.!kgen.target]() if is_nvidia_gpu() else 1](ptr: UnsafePointer[SIMD[type, 1]]) -> SIMD[type, width]

Loads data from global memory into a SIMD vector.

Provides a high-level interface for vectorized memory loads with configurable cache behavior and memory access patterns.

Parameters:

type (DType): The data type to load.
width (Int): Vector width (number of elements to load).
read_only (Bool): If True, marks the load as read-only for cache optimization.
prefetch_size (OptionalReg[Int]): Optional L2 cache prefetch size (64, 128, or 256 bytes).
cache_policy (CacheOperation): Cache operation policy for the load.
eviction_policy (CacheEviction): Cache eviction policy.
alignment (Int): Memory alignment in bytes.

Args:

ptr (UnsafePointer[SIMD[type, 1]]): Pointer to global memory to load from.

Returns:

SIMD vector containing the loaded data.

load[OffsetType: Index, type: DType, //, width: Int = 1, *, read_only: Bool = False, prefetch_size: OptionalReg[Int] = OptionalReg[Int]({:i1 0, 1}), cache_policy: CacheOperation = CacheOperation(0), eviction_policy: CacheEviction = CacheEviction(0), alignment: Int = alignof[::AnyType,__mlir_type.!kgen.target]() if is_nvidia_gpu() else 1](ptr: UnsafePointer[SIMD[type, 1]], offset: OffsetType) -> SIMD[type, width]

Loads data from global memory with an offset into a SIMD vector.

Provides a high-level interface for vectorized memory loads with configurable cache behavior and memory access patterns, supporting offset-based addressing.

Parameters:

OffsetType (Index): Type of the offset value.
type (DType): The data type to load.
width (Int): Vector width (number of elements to load).
read_only (Bool): If True, marks the load as read-only for cache optimization.
prefetch_size (OptionalReg[Int]): Optional L2 cache prefetch size (64, 128, or 256 bytes).
cache_policy (CacheOperation): Cache operation policy for the load.
eviction_policy (CacheEviction): Cache eviction policy.
alignment (Int): Memory alignment in bytes.

Args:

ptr (UnsafePointer[SIMD[type, 1]]): Base pointer to global memory.
offset (OffsetType): Offset from base pointer in elements.

Returns:

SIMD vector containing the loaded data.