Mojo function

buffer_store

buffer_store[dtype: DType, width: Int, *, cache_policy: CacheOperation = CacheOperation(0)](dst_resource: SIMD[uint32, 4], vector_offset: SIMD[int32, 1], val: SIMD[dtype, width], *, scalar_offset: SIMD[int32, 1] = 0)

Stores a register variable to global memory with cache operation control.

Writes to global memory from a register with high-level cache control.

Note:

Only supported on AMD GPUs.
Provides high-level cache control via CacheOperation enum values.
Maps directly to llvm.amdgcn.raw.buffer.store intrinsics.
Cache control bits:
- SC[1:0] controls coherency scope: 0=wave, 1=group, 2=device, 3=system.
- nt=True: Use streaming-optimized cache policies (recommended for streaming data).

Parameters:

dtype (DType): The data type.
width (Int): The SIMD vector width.
cache_policy (CacheOperation): Cache operation policy controlling cache behavior at all levels.

Args:

dst_resource (SIMD): Buffer resource descriptor.
vector_offset (SIMD): Vector memory offset in elements (per thread).
val (SIMD): Value to write.
scalar_offset (SIMD): Scalar memory offset in elements (shared across wave).