Mojo struct
KBuffer
struct KBuffer[: Bool, dtype: DType, layout: Layout, address_space: AddressSpace, alignment: Int, origin: Origin[], masked: Bool, //, mma_shape: IndexList[3], k_group_size: Int, swizzle: OptionalReg[Swizzle], BN: Int, WN: Int, BK: Int, num_threads: Int]
Fields
- load_tile (
LayoutTensor[dtype, row_major((ceildiv[::CeilDivable](BK, (mma_shape.__getitem__[::Indexer](2) * k_group_size)) * ceildiv[::CeilDivable](WN, mma_shape.__getitem__[::Indexer](1))), simdwidthof[::DType,__mlir_type.!kgen.target]()), MutableAnyOrigin, address_space=AddressSpace(5)]
): - mma_tile (
LayoutTensor[dtype, row_major(ceildiv[::CeilDivable](WN, mma_shape.__getitem__[::Indexer](1)), simdwidthof[::DType,__mlir_type.!kgen.target]()), MutableAnyOrigin, address_space=AddressSpace(5)]
): - smem_iter (
LayoutTensorIter[dtype, blocked_product(row_major(BN, simdwidthof[::DType,__mlir_type.!kgen.target]()), row_major(1, 0 if (simdwidthof[::DType,__mlir_type.!kgen.target]() == 0) else (div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) + -1) if (((rem_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) == 0) ^ True) & ((simdwidthof[::DType,__mlir_type.!kgen.target]() < 0) ^ (BK < 0))) else div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">)), True), MutableAnyOrigin, address_space=AddressSpace(3), circular=True]
): - bounds (
Int
): - global_iterator (
LayoutTensorIter[dtype, _compute_tile_layout[*::Int]()[0], origin, address_space=address_space, axis=OptionalReg[Int]({:@stdlib::@builtin::@int::@Int {1}, 0}), layout_int_type=_get_layout_type(layout, address_space), linear_idx_type=_get_index_type(layout, address_space), masked=masked if masked else _tile_is_masked[::Layout,*::Int]()]
):
Implemented traits
AnyType
,
UnknownDestructibility
Aliases
base_layout
alias base_layout = row_major(BN, simdwidthof[::DType,__mlir_type.!kgen.target]())
GlobalTensorType
alias GlobalTensorType = LayoutTensor[dtype, layout, origin, address_space=address_space, masked=masked, alignment=alignment]
GlobalTiledIteratorType
alias GlobalTiledIteratorType = LayoutTensorIter[dtype, _compute_tile_layout[*::Int]()[0], origin, address_space=address_space, axis=OptionalReg[Int]({:@stdlib::@builtin::@int::@Int {1}, 0}), layout_int_type=_get_layout_type(layout, address_space), linear_idx_type=_get_index_type(layout, address_space), masked=masked if masked else _tile_is_masked[::Layout,*::Int]()]
LoadTileType
alias LoadTileType = LayoutTensor[dtype, row_major((ceildiv[::CeilDivable](BK, (mma_shape.__getitem__[::Indexer](2) * k_group_size)) * ceildiv[::CeilDivable](WN, mma_shape.__getitem__[::Indexer](1))), simdwidthof[::DType,__mlir_type.!kgen.target]()), MutableAnyOrigin, address_space=AddressSpace(5)]
MMA_K
alias MMA_K = mma_shape.__getitem__[::Indexer](2)
MMA_N
alias MMA_N = mma_shape.__getitem__[::Indexer](1)
MMATileType
alias MMATileType = LayoutTensor[dtype, row_major(ceildiv[::CeilDivable](WN, mma_shape.__getitem__[::Indexer](1)), simdwidthof[::DType,__mlir_type.!kgen.target]()), MutableAnyOrigin, address_space=AddressSpace(5)]
num_k_tiles
alias num_k_tiles = ceildiv[::CeilDivable](BK, (mma_shape.__getitem__[::Indexer](2) * k_group_size))
num_mmas
alias num_mmas = ceildiv[::CeilDivable](WN, mma_shape.__getitem__[::Indexer](1))
num_repeats
alias num_repeats = 0 if (simdwidthof[::DType,__mlir_type.!kgen.target]() == 0) else (div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) + -1) if (((rem_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) == 0) ^ True) & ((simdwidthof[::DType,__mlir_type.!kgen.target]() < 0) ^ (BK < 0))) else div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">)
SharedIterType
alias SharedIterType = LayoutTensorIter[dtype, blocked_product(row_major(BN, simdwidthof[::DType,__mlir_type.!kgen.target]()), row_major(1, 0 if (simdwidthof[::DType,__mlir_type.!kgen.target]() == 0) else (div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) + -1) if (((rem_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) == 0) ^ True) & ((simdwidthof[::DType,__mlir_type.!kgen.target]() < 0) ^ (BK < 0))) else div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">)), True), MutableAnyOrigin, address_space=AddressSpace(3), circular=True]
SharedTileType
alias SharedTileType = LayoutTensor[dtype, blocked_product(row_major(BN, simdwidthof[::DType,__mlir_type.!kgen.target]()), row_major(1, 0 if (simdwidthof[::DType,__mlir_type.!kgen.target]() == 0) else (div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) + -1) if (((rem_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) == 0) ^ True) & ((simdwidthof[::DType,__mlir_type.!kgen.target]() < 0) ^ (BK < 0))) else div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">)), True), MutableAnyOrigin, address_space=AddressSpace(3), layout_int_type=_get_index_type(AddressSpace(3)), linear_idx_type=_get_index_type(AddressSpace(3))]
SharedWarpTileType
alias SharedWarpTileType = LayoutTensor[dtype, _compute_tile_layout[*::Int]()[0], MutableAnyOrigin, address_space=AddressSpace(3), layout_int_type=_get_index_type(AddressSpace(3)), linear_idx_type=_get_index_type(AddressSpace(3)), masked=_tile_is_masked[::Layout,*::Int]()]
simd_width
alias simd_width = simdwidthof[::DType,__mlir_type.!kgen.target]()
smem_layout
alias smem_layout = blocked_product(row_major(BN, simdwidthof[::DType,__mlir_type.!kgen.target]()), row_major(1, 0 if (simdwidthof[::DType,__mlir_type.!kgen.target]() == 0) else (div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) + -1) if (((rem_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) == 0) ^ True) & ((simdwidthof[::DType,__mlir_type.!kgen.target]() < 0) ^ (BK < 0))) else div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">)), True)
thread_layout
alias thread_layout = row_major((div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int num_threads, "value">, 4) + -1) if ((num_threads < 0) & ((rem_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int num_threads, "value">, 4) == 0) ^ True)) else div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int num_threads, "value">, 4), 4)
tiler_layout
alias tiler_layout = row_major(1, 0 if (simdwidthof[::DType,__mlir_type.!kgen.target]() == 0) else (div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) + -1) if (((rem_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">) == 0) ^ True) & ((simdwidthof[::DType,__mlir_type.!kgen.target]() < 0) ^ (BK < 0))) else div_s(#lit.struct.extract<:@stdlib::@builtin::@int::@Int BK, "value">, #lit.struct.extract<:@stdlib::@builtin::@int::@Int cond(eq(#lit.struct.extract<:@stdlib::@builtin::@int::@Int apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>), "value">, 0), {1}, apply(:!lit.generator<() -> !lit.struct<@stdlib::@builtin::@int::@Int>> @stdlib::@sys::@info::@"simdwidthof[::DType,__mlir_type.!kgen.target]()"<:@stdlib::@builtin::@dtype::@DType dtype, :target apply(:!lit.generator<() -> !kgen.target> @stdlib::@sys::@info::@"_current_target()")>)), "value">))
wtile_dim0
alias wtile_dim0 = WN
wtile_dim1
alias wtile_dim1 = BK
Methods
__init__
__init__(out self, global_tile: LayoutTensor[dtype, layout, origin, address_space=address_space, masked=masked, alignment=alignment], num_b_rows: OptionalReg[Int], shared_ptr: UnsafePointer[SIMD[dtype, 1], address_space=AddressSpace(3), alignment=alignment, mut=mut, origin=origin])
load_from_dram
load_from_dram(mut self)
get_mma_tile
get_mma_tile(self) -> LayoutTensor[dtype, row_major(ceildiv[::CeilDivable](WN, mma_shape.__getitem__[::Indexer](1)), simdwidthof[::DType,__mlir_type.!kgen.target]()), MutableAnyOrigin, address_space=AddressSpace(5)]
Returns:
copy_to_shared
copy_to_shared(self)
load_from_shared
load_from_shared[accum_type: DType, mma_input_type: DType, mma_shape: IndexList[3], k_group_size: Int, transpose_b: Bool, k_mma: Int](self)
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