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Mojo struct

IteratorScatterGatherAmd

struct IteratorScatterGatherAmd[thread_layout: Layout, num_threads: Int = thread_layout.size(), thread_scope: ThreadScope = ThreadScope.BLOCK, block_dim_count: Int = 1]

Iterator-based AMD scatter-gather for DRAM-register data movement.

Parameters

  • thread_layout (Layout): Thread organization layout.
  • num_threads (Int): Total threads (defaults to thread_layout size).
  • thread_scope (ThreadScope): Thread execution scope (block or warp).
  • block_dim_count (Int): Number of block dimensions.

Fields

  • buffer (AMDBufferResource):

Implemented traits

AnyType, ImplicitlyDestructible

comptime members

__del__is_trivial

comptime __del__is_trivial = True

Methods

__init__

__init__(out self, tensor: LayoutTensor[tensor.dtype, tensor.layout, tensor.origin, address_space=tensor.address_space, element_layout=tensor.element_layout, layout_int_type=tensor.layout_int_type, linear_idx_type=tensor.linear_idx_type, masked=tensor.masked, alignment=tensor.alignment], tensor_iter: LayoutTensorIter[tensor_iter.dtype, tensor_iter.layout, tensor_iter.origin, address_space=tensor_iter.address_space, alignment=tensor_iter.alignment, circular=tensor_iter.circular, axis=tensor_iter.axis, layout_int_type=tensor_iter.layout_int_type, linear_idx_type=tensor_iter.linear_idx_type, masked=tensor_iter.masked])

Initialize with tensor and iterator.

Args:

copy

copy(self, dst_reg_tile: LayoutTensor[dst_reg_tile.dtype, dst_reg_tile.layout, dst_reg_tile.origin, address_space=dst_reg_tile.address_space, element_layout=dst_reg_tile.element_layout, layout_int_type=dst_reg_tile.layout_int_type, linear_idx_type=dst_reg_tile.linear_idx_type, masked=dst_reg_tile.masked, alignment=dst_reg_tile.alignment], src_gmem_tile_iter: LayoutTensorIter[src_gmem_tile_iter.dtype, src_gmem_tile_iter.layout, src_gmem_tile_iter.origin, address_space=src_gmem_tile_iter.address_space, alignment=src_gmem_tile_iter.alignment, circular=src_gmem_tile_iter.circular, axis=src_gmem_tile_iter.axis, layout_int_type=src_gmem_tile_iter.layout_int_type, linear_idx_type=src_gmem_tile_iter.linear_idx_type, masked=src_gmem_tile_iter.masked])

Copy DRAM to registers via iterator.

Args:

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