IMPORTANT: To view this page as Markdown, append `.md` to the URL (e.g. /max/get-started.md). For the complete documentation index, see llms.txt.
Skip to main content
For the complete documentation index, see llms.txt. Markdown versions of all pages are available by appending .md to any URL (e.g. /max/get-started.md).

Mojo struct

SmemBarriers

struct SmemBarriers[num_group_pipeline_stages: Int, num_accum_pipeline_stages: Int, num_clc_pipeline_stages: Int]

Composable barrier storage for SM100 matmul SMEM structs.

This struct consolidates all barrier-related storage and accessors, enabling code reuse across MatmulSmem, BlockScaledSmem, and BlockwiseFP8Smem through composition.

Usage: Compose this struct into SMEM structs and delegate accessors:

```
struct MySmem[...]:
    var barriers: SmemBarriers[num_group, num_accum, num_clc]

    def input_barriers(ref[AddressSpace.SHARED] self):
        return self.barriers.input_barriers()
```

Parameters​

  • ​num_group_pipeline_stages (Int): Number of K-group pipeline stages.
  • ​num_accum_pipeline_stages (Int): Number of accumulator pipeline stages.
  • ​num_clc_pipeline_stages (Int): Number of CLC pipeline stages.

Fields​

  • ​input_barriers_storage (SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].InputBarriers.Storage):
  • ​accum_barriers_storage (SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].AccumBarriers.Storage):
  • ​clc_full_storage (SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcBarriers.Storage):
  • ​clc_empty_storage (SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcBarriers.Storage):
  • ​clc_throttle_storage (SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcThrottleBarriers.Storage):
  • ​clc_response_storage (SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcResponse.Storage):
  • ​tmem_dealloc_storage (SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].TmemDealloc.Storage):
  • ​tmem_addr_storage (SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].TmemAddr.Storage):

Implemented traits​

AnyType, ImplicitlyDestructible

comptime members​

AccumBarriers​

comptime AccumBarriers = SMemArray[SharedMemBarrier, (num_accum_pipeline_stages * 2)]

ClcBarriers​

comptime ClcBarriers = SMemArray[SharedMemBarrier, num_clc_pipeline_stages]

ClcResponse​

comptime ClcResponse = SMemArray[UInt128, num_clc_pipeline_stages]

ClcThrottleBarriers​

comptime ClcThrottleBarriers = SMemArray[SharedMemBarrier, (num_clc_pipeline_stages * 2)]

InputBarriers​

comptime InputBarriers = SMemArray[SharedMemBarrier, (num_group_pipeline_stages * 2)]

TmemAddr​

comptime TmemAddr = SMemArray[UInt32, 1]

TmemDealloc​

comptime TmemDealloc = SMemArray[SharedMemBarrier, 1]

Methods​

input_barriers​

input_barriers(ref[AddressSpace._value] self) -> SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].InputBarriers

Returns input tile pipeline barriers (2 per group stage).

Returns:

SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].InputBarriers

accum_barriers​

accum_barriers(ref[AddressSpace._value] self) -> SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].AccumBarriers

Returns accumulator pipeline barriers (2 per accum stage).

Returns:

SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].AccumBarriers

clc_full​

clc_full(ref[AddressSpace._value] self) -> SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcBarriers

Returns CLC full barriers (1 per CLC stage).

Returns:

SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcBarriers

clc_empty​

clc_empty(ref[AddressSpace._value] self) -> SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcBarriers

Returns CLC empty barriers (1 per CLC stage).

Returns:

SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcBarriers

clc_throttle​

clc_throttle(ref[AddressSpace._value] self) -> SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcThrottleBarriers

Returns CLC throttle barriers (2 per CLC stage).

Returns:

SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcThrottleBarriers

clc_response​

clc_response(ref[AddressSpace._value] self) -> SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcResponse

Returns CLC response storage (1 UInt128 per CLC stage).

Returns:

SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].ClcResponse

tmem_dealloc​

tmem_dealloc(ref[AddressSpace._value] self) -> SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].TmemDealloc

Returns TMEM deallocation barrier.

Returns:

SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].TmemDealloc

tmem_addr​

tmem_addr(ref[AddressSpace._value] self) -> SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].TmemAddr

Returns TMEM address storage.

Returns:

SmemBarriers[num_group_pipeline_stages, num_accum_pipeline_stages, num_clc_pipeline_stages].TmemAddr

Models

Cookbook

Puzzles

Blog

Community

Contact