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Mojo struct

AMDIGLPStrategy

struct AMDIGLPStrategy

Preset strategy values for the llvm.amdgcn.iglp.opt intrinsic.

LLVM AMDGPU defines these as named presets in AMDGPUIGroupLP.cpp; the integer values are the second argument to the intrinsic. All presets assume MFMAs are present in the region; using on a non-MFMA region falls back gracefully but provides no constraints.

Per AMD docs, mutually exclusive with sched_group_barrier in the same scheduling region β€” pick one or the other per cluster.

Implemented traits​

AnyType, Copyable, Equatable, ImplicitlyCopyable, ImplicitlyDestructible, Intable, Movable, RegisterPassable, TrivialRegisterPassable

comptime members​

MFMA_EXP_INTERLEAVE​

comptime MFMA_EXP_INTERLEAVE = AMDIGLPStrategy(Int32(2))

MFMAExpInterleaveOpt β€” multi-phase attention preset (MFMA + exp2).

The preset HKMhaPrefill uses: drives the MFMA/VALU/TRANS triple interleave that flash-attention-style softmax wants.

MFMA_EXP_SIMPLE_INTERLEAVE​

comptime MFMA_EXP_SIMPLE_INTERLEAVE = AMDIGLPStrategy(Int32(3))

MFMAExpSimpleInterleaveOpt β€” interleaves 1 TRANS per 1 MFMA.

MFMA_SMALL_GEMM​

comptime MFMA_SMALL_GEMM = AMDIGLPStrategy(Int32(0))

MFMASmallGemmOpt β€” interleaves 2 DS reads per 1 MFMA.

MFMA_SMALL_GEMM_SINGLE_WAVE​

comptime MFMA_SMALL_GEMM_SINGLE_WAVE = AMDIGLPStrategy(Int32(1))

MFMASmallGemmSingleWaveOpt β€” single-wave variant for small GEMMs.

Methods​

__eq__​

__eq__(self, other: Self) -> Bool

Returns:

Bool

__ne__​

__ne__(self, other: Self) -> Bool

Returns:

Bool

__int__​

__int__(self) -> Int

Returns:

Int