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Mojo struct

ContextParams

struct ContextParams

Comptime half of Context. Bundled into one template parameter so callers write Context[params] instead of threading eight separate comptime args.

Tier discriminator (GPU): _tier (a ReduceTier) picks exactly one of warp / serial / split-K, or Block (also every CPU tier). emit_tile_width > 1 further marks the tiled (SIMD-on-outputs) tier, independent of _tier. The same fields exist on CPU but only emit_tile_width and simd_width matter; _tier is always Block. _tier is a _-prefixed scaffolder internal (set by the tier picker) β€” a body never reads it.

target (comptime) is the dispatcher's switch β€” "cpu" selects the CPU backend, anything else the GPU backend.

Fields​

  • ​axis (Int): Axis being reduced.
  • ​emit_tile_width (Int): Rows-per-thread. 1 for warp/block/serial/split-K tiers, > 1 for the tiled tier (SIMD-on-outputs).
  • ​BLOCK_SIZE (Int): Threads per block (kernel-launch shape). GPU-only; 1 on CPU.
  • ​simd_width (Int): SIMD width. On GPU, the block tier's axis-direction load width (ignored by tiled/warp/serial). On CPU, the width the scaffolder walks the axis with.
  • ​target (StaticString): "cpu" or "gpu" β€” picks which backend the unified rowwise.{reduce, pjoin, once, launch} dispatches to.

Implemented traits​

AnyType, Copyable, Deinitable, ImplicitlyCopyable, Movable, RegisterPassable, TrivialRegisterPassable

Methods​

__init__​

def __init__(axis: Int, emit_tile_width: Int, BLOCK_SIZE: Int, simd_width: Int, target: StringSpan[ImmStaticOrigin], tier: ReduceTier = ReduceTier.Block, num_phases: Int = Int(0)) -> Self

Initializes a ContextParams from per-tier comptime values.

Args:

  • ​axis (Int): Axis being reduced.
  • ​emit_tile_width (Int): Rows-per-thread (1 for cooperative tiers).
  • ​BLOCK_SIZE (Int): Threads per block.
  • ​simd_width (Int): SIMD width for the block tier's axis load.
  • ​target (StringSpan[ImmStaticOrigin]): "cpu" or "gpu".
  • ​tier (ReduceTier): Tier discriminator (ReduceTier.Block by default β€” every CPU tier and the GPU tiled/cooperative tiers).
  • ​num_phases (Int): Per-element-output split-K total phase count (<= 1 disables the tier).