IMPORTANT: To view this page as Markdown, append `.md` to the URL (e.g. /max/get-started.md). For the complete documentation index, see llms.txt.
Skip to main content
For the complete documentation index, see llms.txt. Markdown versions of all pages are available by appending .md to any URL (e.g. /max/get-started.md).

Mojo function

flare_mla_decoding_dispatch

def flare_mla_decoding_dispatch[k_t: MHAOperand, mask_t: MHAMask, dtype: DType, //, kv_num_heads: Int, config: MHAConfig[dtype], ragged: Bool = False, _is_cache_length_accurate: Bool = False, _use_valid_length: Bool = True, decoding_warp_split_k: Bool = False, per_token_scale_rope_aware: Bool = False, sparse: Bool = False, rope_aware_kv_sparse: Bool = False, fold_shared_index: Bool = False](output: TileTensor[Storage=output.Storage, linear_idx_type=output.linear_idx_type], q: TileTensor[dtype, Storage=q.Storage, linear_idx_type=q.linear_idx_type], k: k_t, mask_functor: mask_t, valid_length: TileTensor[DType.uint32, Storage=valid_length.Storage, linear_idx_type=valid_length.linear_idx_type], max_prompt_len: Int, max_cache_valid_length: Int, scale: Float32, ctx: DeviceContext, scalar_args_buf: NullableTileTensor[DType.int64, linear_idx_type=scalar_args_buf.linear_idx_type, element_size=scalar_args_buf.element_size], kv_input_row_offsets: OptionalReg[LayoutTensor[DType.uint32, Layout.row_major(Int(-1)), ImmutAnyOrigin]] = None, num_partitions: Optional[Int] = None, q_scale_ptr: OptionalReg[Pointer[Float32, MutAnyOrigin, _safe=False]] = None, d_indices: OptionalReg[Pointer[Int32, MutAnyOrigin, _safe=False]] = None, indices_stride: Int = Int(0), topk_lengths: OptionalReg[Pointer[Int32, MutAnyOrigin, _safe=False]] = None, attn_sink_ptr: OptionalReg[Pointer[Float32, MutAnyOrigin, _safe=False]] = None, extra_k: OptionalReg[k_t] = None, extra_d_indices: OptionalReg[Pointer[Int32, MutAnyOrigin, _safe=False]] = None, extra_indices_stride: Int = Int(0), extra_topk_lengths: OptionalReg[Pointer[Int32, MutAnyOrigin, _safe=False]] = None, extra_scales_ptr: OptionalReg[Pointer[Float32, MutAnyOrigin, _safe=False]] = None, num_partitions_in: Optional[Int] = None)

Dispatches an MLA decoding request to the platform-specific kernel.

Routes to the SM100 (mla_decode_sm100_dispatch), AMD, or legacy NVIDIA decode path based on the target GPU, selects the block-M tile geometry (including the AMD MTP token-fold and BM=32/64 heuristic), and launches the mla_decoding kernel with optional split-K reduction via mla_splitk_reduce.

Parameters:

  • ​k_t (MHAOperand): KV cache operand type backing k (inferred). Either KVCacheMHAOperand (paged cache) or LayoutTensorMHAOperand (TileTensor input).
  • ​mask_t (MHAMask): Mask functor type applied to attention scores (inferred).
  • ​dtype (DType): Element type of q (inferred). Must be a half-float or float8_e4m3fn.
  • ​kv_num_heads (Int): Number of KV attention heads. Must be 1 for MLA.
  • ​config (MHAConfig[dtype]): MLA attention config carrying num_heads and depth (576 for DeepSeek V2/3).
  • ​ragged (Bool): Whether q is a ragged rank-3 tensor with batch offsets in valid_length instead of a padded rank-4 tensor (defaults to False).
  • ​_is_cache_length_accurate (Bool): Workaround unifying KVCache and TileTensor inputs: True when max_cache_valid_length is the accurate latest length (TileTensor case); False when it precedes the latest tokens, for example zero for continuous execution (KV cache case) (defaults to False).
  • ​_use_valid_length (Bool): Whether valid_length is needed for masking; False skips it for TileTensor inputs to avoid benchmark overhead (defaults to True).
  • ​decoding_warp_split_k (Bool): Whether to use warp-level split-K reduction within the decode kernel (defaults to False).
  • ​per_token_scale_rope_aware (Bool): Whether q and the KV cache use the interleaved FP8+BF16 rope-aware layout (640 bytes/row, 576 logical dims) (defaults to False).
  • ​sparse (Bool): Whether to use sparse attention with pre-computed physical KV row indices via gather4 TMA (defaults to False).
  • ​rope_aware_kv_sparse (Bool): Sparse-only routing flag: True selects the BF16-rope sparse kernel (split FP8 nope + BF16 rope); False selects the all-FP8 sparse kernel (defaults to False).
  • ​fold_shared_index (Bool): Whether to use the read-once shared-index fold that packs folded output/LSE slots into one CTA (defaults to False).

Args:

Was this page helpful?